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• W2056511318 abstract "This paper presents a 160 GHz center frequency pulsed 65 nm CMOS transceiver for short range radar applications. Four phased array transceivers were implemented in a single chip with antennas implemented in a BGA package. The implemented transmitter is capable of producing pulses of 100 ps widths ( >20 GHz RF bandwidth) at a 160 GHz carrier frequency. The measured effective isotropic radiated power (EIRP) is 18.8 dBm for continuous wave outputs. The analog beam forming receiver achieves an overall gain of 42.5 dB, -14 dBm IP1dB, 7 GHz bandwidth, and a noise figure of 22.5 dB. The sliding window time-dilation baseband relaxes the output data rate and subsequent digital processing requirements. Fine grained duty cycling reduces power dissipation. The entire chip consumes 2.2 W from 1.2/1.4 V supplies in a 65 nm digital CMOS process." @default.
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• W2056511318 date "2014-04-01" @default.
• W2056511318 modified "2023-09-26" @default.
• W2056511318 title "A 160 GHz Pulsed Radar Transceiver in 65 nm CMOS" @default.
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• W2056511318 doi "https://doi.org/10.1109/jssc.2014.2298033" @default.
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