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- W2057899754 abstract "In this paper, we present a deep subthreshold 6-T SRAM, which was fabricated in an industrial 0.13 mum CMOS technology. We first use detailed simulations to explore the challenges of ultra-low-voltage memory design with a specific emphasis on the implications of variability. We then propose a single-ended 6-T SRAM design with a gated-feedback write-assist that remains robust deep in the subthreshold regime. Measurements of a test chip show that the proposed memory architecture functions from 1.2 V down to 193 mV and provides a 36% improvement in energy consumption over the previously proposed multiplexer-based subthreshold SRAM designs while using only half the area. Adjustable footers and headers are introduced, as well as body bias techniques to extend voltage scaling limits." @default.
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- W2057899754 date "2008-10-01" @default.
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- W2057899754 title "A Variation-Tolerant Sub-200 mV 6-T Subthreshold SRAM" @default.
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- W2057899754 doi "https://doi.org/10.1109/jssc.2008.2001903" @default.
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