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• W2058113779 abstract "In this work, we propose a technique to reduce switching activity while keeping leakage current under control during testing by extracting don't cares from a completely specified pattern set, and using the X bits to convert original vectors into low power vectors by a dictionary based approach. We also investigate the possibility of reducing test set length, maintaining fault coverage, by performing a tradeoff between test set volume and power. Experiments on ISCAS89 benchmark circuits validate effectiveness of our work. We could achieve an average reduction of 84.78% in dynamic power and 6.52% in leakage power for pattern set generated by the ATPG tool Atalanta. Similar savings could also be achieved on test set generated by the commercial ATPG tool Tetramax." @default.
• W2058113779 created "2016-06-24" @default.
• W2058113779 creator A5061993122 @default.
• W2058113779 creator A5067628877 @default.
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• W2058113779 date "2012-03-01" @default.
• W2058113779 modified "2023-09-26" @default.
• W2058113779 title "Customizing completely specified pattern set targeting dynamic and leakage power reduction during testing" @default.
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• W2058113779 doi "https://doi.org/10.1016/j.vlsi.2011.08.001" @default.
• W2058113779 hasPublicationYear "2012" @default.
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