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- W2058451750 abstract "Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. This paper proposes a method of characterizing correlation of signal transitions in multiple nets by considering both timing and functionality of the signals, and uses it in an analysis procedure to eliminate noise faults that cannot actually happen when such correlations are considered. It uses four-variable Boolean logic to characterize signal transitions in a time interval, and formulates Boolean satisfiability between aggressors and a victim under the min-max delay model for gates. The technique has been successfully applied to commercial ASIC designs and has eliminated up to 35% of delay noise faults reported by a state-of-the-art noise analysis tool." @default.
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- W2058451750 date "2003-06-02" @default.
- W2058451750 modified "2023-09-27" @default.
- W2058451750 title "Temporofunctional crosstalk noise analysis" @default.
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- W2058451750 doi "https://doi.org/10.1145/775832.776048" @default.
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