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• W2059122932 abstract "Drain lag in heterojunction FETs (HJFETs) on hole-trap substrates is numerically simulated. The slow drain-current responses of HJFETs on floating substrates are limited by electron capture and emission even with hole-trap substrates, since the total hole concentration in the substrate is kept constant because of the absence of a hole terminal. In addition, time constants for drain current variations are much smaller than those for electron capture and emission of the traps estimated from Shockley-Read-Hall (SRH) statistics, since the processes are enhanced by internal hole movement." @default.
• W2059122932 created "2016-06-24" @default.
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• W2059122932 date "1997-03-01" @default.
• W2059122932 modified "2023-10-01" @default.
• W2059122932 title "Numerical simulation of drain lag in HJFETs on hole-trap substrates" @default.
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• W2059122932 doi "https://doi.org/10.1016/s0038-1101(96)00194-3" @default.
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