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- W2061921448 abstract "A high density, non-volatile RAM cell composed of a volatile RAM component, merged with a non-volatile element which shadows the RAM component, is described. Unlike earlier low density Shadow RAM approaches, small cell size is achieved here by utilizing a vertically integrated 1T-1C DRAM element merged with a highly compact, vertically integrated, triple-level poly-silicon floating gate structure. Non-volatile operations on the floating gate stack are performed by Fowler-Nordheim electron injection through both a tunnel oxide, and through a first level to third level poly-silicon sidewall which has proven successful in earlier E <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> PROMs. The non-volatile approach lends itself readily to 5 Volt-only implementation, using on-chip voltage multiplication techniques, by virtue of the miniscule Fowler-Nordheim charging currents needed, combined with a single high voltage STORE implementation scheme using a common third level poly-Si line. Cell operation for the non-volatile BULK STORE and BULK RECALL functions as well as volatile bit operations are described. Also shown is the cell layout, which consumes 1.5 mil <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> area, based on 3µ design rules, making it readily compatible with 16K NOVRAM density levels." @default.
- W2061921448 created "2016-06-24" @default.
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- W2061921448 date "1982-01-01" @default.
- W2061921448 modified "2023-09-25" @default.
- W2061921448 title "High density 5 Volt-only compatible non-volatile RAM cell" @default.
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- W2061921448 doi "https://doi.org/10.1109/iedm.1982.190398" @default.
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