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• W2063009887 abstract "The LHCb Level-0 trigger implementation with the 3D-Flow system offers full programmability, allowing it to adapt to unexpected operating conditions and enabling new, unpredicted physics. The implementation is described in detail and refers to components and technology available today. The 3D-Flow Processor system is a new, technology-independent concept in very fast, real-time system architectures. Based on the replication of a single type of circuit of 100k gates, which communicates in six directions: bi-directional with North, East, West, and South neighbors, unidirectional from Top to Bottom, the system offers full programmability, modularity, ease of expansion and adaptation to the latest technology. A complete study of its applicability to the LHCb calorimeter triggers is presented. Full description of the input data handling, either in digital or mixed digital-analog form, of the data processing, and the transmission of results to the global level-0 trigger decision unit are provided. Any level-0 trigger algorithm (2×2, 3×3, 4×4, etc.) with up to 20 steps, can be implemented with zero dead-time, while sustaining input data rate (up to 32-bit per input channel, per bunch crossing) at 40 MHz. For each step, each 3D-Flow processor can execute up to 26 operations, inclusive of compare, ranging, finding local maxima, and efficient data exchange with neighboring channels. (One-to-one correspondence between input channel and trigger tower.) Populated with only two main types of components, front-end FPGAs and 3D-Flow processors, a single type of board, it is shown how the whole Level-0 calorimeter trigger can be accommodated into six crates (9U), each containing 16 identical boards. All 3D-Flow inter-chip Bottom to Top ports connection are all contained on the board (data are multiplexed 2 : 1, PCB traces are shorter than 6 cm); all 3D-flow inter-chip North, East, West, and South ports connections, between boards and crates, are multiplexed (8+2) : 1 and are shorter than 1.5 m. Full implementation of a 3D-Flow system, for the most complex trigger algorithm, requires 320 cables to north and south crates and 40 cables to east and west crates (Cable cost=$2 each). For applications requiring a simpler real-time algorithm (e.g., requiring less than 20 steps, which is equivalent to 10 layers of 3D-Flow processors), then the number of connections for the inter-boards (North and South), and inter-crates (East and West) will also be reduced to the number of layers used by the simpler algorithm, thus not requiring to install all cables (e.g., applications requiring only nine layers of 3D-Flow processors will save 32 cables to the North, 32 to the South, four to the East, and four to the West crates). Details are also given on timing and synchronization issues, ASIC design verification, real-time performance monitoring and design (software and hardware) development tools." @default.
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• W2063009887 date "1999-11-01" @default.
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• W2063009887 title "LHCb base-line level-0 trigger 3D-Flow implementation" @default.
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• W2063009887 doi "https://doi.org/10.1016/s0168-9002(99)00496-9" @default.
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