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- W2068067291 abstract "Among III-N semiconductors, InN has long been attractive for high-frequency devices because of its predicted high electron velocity (> 3 × 107 cm/s) and low effective mass [1]. However, experimental devices have been hard to demonstrate due to high n-type unintentional doping densities (UID) (> 1017 cm-3) and large surface conduction. In this work, through comprehensive simulation, we show that through judicious design of a tri-gate InN device and polarization engineering, a FET operation is realized even with high UID. The simulated 50 nm gate length device shows excellent DC and RF performance with calculated values of gm 1.07 mS/μm, ft 495 GHz, intrinsic fmax 760 GHz, and off state current of 0.007 mA/ μm." @default.
- W2068067291 created "2016-06-24" @default.
- W2068067291 creator A5012931152 @default.
- W2068067291 creator A5069691731 @default.
- W2068067291 date "2013-06-01" @default.
- W2068067291 modified "2023-09-26" @default.
- W2068067291 title "A 50 nm gate length InN tri-gate FET design with g<inf>m</inf> of 1.07 mS/μm and f<inf>t</inf> of 495 GHz" @default.
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- W2068067291 doi "https://doi.org/10.1109/drc.2013.6633803" @default.
- W2068067291 hasPublicationYear "2013" @default.
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