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- W2068185573 abstract "A novel polycrystalline silicon (poly-Si) thin film transistor (TFT) formed by using the large-angle-tilt-implanted-drain (LATID) scheme has been proposed. The LATID TFT can achieve much smaller off-state leakage than the lightly doped drain (LDD) TFT. The result is attributable to the reduced electric field near the drain region and thus more effective suppression of carrier emission via trap states. Moreover, the on-state current does not have a large difference in comparison with the LDD TFT, due to the gate-overlapped structure formed by using a simple fabrication process. As a result, a poly-Si TFT with excellent device characteristics and a high on/off current ratio can be implemented by simply using the LATID fabrication scheme." @default.
- W2068185573 created "2016-06-24" @default.
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- W2068185573 date "2005-11-15" @default.
- W2068185573 modified "2023-10-18" @default.
- W2068185573 title "High-performance polycrystalline-Si thin film transistors formed by using large-angle-tilt implanted drains" @default.
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- W2068185573 doi "https://doi.org/10.1088/0268-1242/20/12/014" @default.
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