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- W2068696307 abstract "A new analogue/digital convertor (ADC) architecture is proposed which is well suited to monolithic integration of high-speed high-resolution ADC systems. The new architecture uses a two-stage parallel-serial feedforward structure but replaces the conventional interstage digital/analogue convertor (DAC) with a distributed error amplifier. Circuit simulations predict an 8.4 ns cycle time (excluding sample-hold time requirements) for a 12-bit ADC integrated in an advanced 1 ?m silicon bipolar technology." @default.
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- W2068696307 date "1985-01-01" @default.
- W2068696307 modified "2023-09-23" @default.
- W2068696307 title "New proposal for a high-speed high-resolution analogue/digital convertor with reduced component count" @default.
- W2068696307 doi "https://doi.org/10.1049/el:19850168" @default.
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