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• W2068755411 abstract "This paper investigates the basic mechanisms of hysteretic delay and noise margin variations for floating-body partially-depleted SOI CMOS circuits in detail. Three cases, based on whether the input are domino input signals from other circuits; input signals from static circuits or latches; or a combination of domino and static input signals are examined and differentiated. It is shown that hysteretic delay variation is larger and noise margin worse for the later case with mixed and static input signals. Although the delay and noise margin disparities between the three types of input are significant at beginning of the clock cycles, they converge as the circuit approaches steady-state." @default.
• W2068755411 created "2016-06-24" @default.
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• W2068755411 date "1999-01-01" @default.
• W2068755411 modified "2023-09-25" @default.
• W2068755411 title "Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits" @default.
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• W2068755411 doi "https://doi.org/10.1145/313817.313931" @default.
• W2068755411 hasPublicationYear "1999" @default.
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