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- W2069463312 abstract "A permanent current in addition to the main clocked current is sometimes used to increase the maximum clock rate of a bipolar latch. Although it speeds up the activation of a clocked differential stage, it deteriorates the latch function by the additional current in the inactive phase of each differential stage. Thus, a keep-alive current must be kept small with respect to the main clocked current. In this Letter, a compensation technique is shown avoiding the erroneous output of a keep-alive current. It still speeds up the activation of the main transistor pair, but results in a constant symmetric offset without affecting the differential value of the output voltage. In simulations of flip-flops and clocked comparators, this compensated keep-alive current has a much larger effect on the maximum clock rate than the uncompensated keep-alive current used so far." @default.
- W2069463312 created "2016-06-24" @default.
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- W2069463312 date "2015-03-01" @default.
- W2069463312 modified "2023-09-27" @default.
- W2069463312 title "Bipolar latch with compensated keep‐alive current" @default.
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- W2069463312 doi "https://doi.org/10.1049/joe.2015.0017" @default.
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