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• W2070122691 abstract "This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800×800 μm2 and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis." @default.
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• W2070122691 date "2012-11-01" @default.
• W2070122691 modified "2023-09-22" @default.
• W2070122691 title "An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm" @default.
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• W2070122691 doi "https://doi.org/10.1109/biocas.2012.6418464" @default.
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