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- W2070448227 abstract "In modern architectures, memory access latency is an increasingly performance-limiting factor. To reduce this latency, we propose concepts and implementation of a new technique that uses an in-memory processor to precompute future, critical load addresses and forward the computed values to the main processor. The acronym for this technique is IMPT for In-Memory Precomputation-based forwarding Threads. IMPT combines the advantages of precomputation-based techniques with the low memory access latency of processing-in-memory. To evaluate IMPT, we use a cycle-accurate simulation of an aggressive out-of-order processor with accurate simulation of bus and memory contention. The results show a performance gain of up to 1.47 (1.21 on average) over an aggressive superscalar processor. The average load access latency decreases by up to 55% (32% on average)." @default.
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- W2070448227 date "2004-06-26" @default.
- W2070448227 modified "2023-09-27" @default.
- W2070448227 title "Data forwarding through in-memory precomputation threads" @default.
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- W2070448227 doi "https://doi.org/10.1145/1006209.1006239" @default.
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