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• W2071079746 abstract "Low-power SRAMs embed mechanisms for reducing static power consumption. When the SRAM is not accessed during a long period, it switches into an intermediate low-power mode. In this mode, a voltage regulator is used to reduce the voltage supplied to the core-cells as low as possible without data loss. Thus, faulty-free behavior of the voltage regulator is crucial for ensuring data retention in core-cells when the SRAM is in low-power mode. This paper investigates the root cause of data retention faults due to voltage regulator malfunctions. This analysis is done under realistic conditions (i.e., industrial core-cells affected by process variations). Based on this analysis, we propose an efficient test flow for detecting data retention faults in low-power SRAMs." @default.
• W2071079746 created "2016-06-24" @default.
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• W2071079746 date "2013-03-18" @default.
• W2071079746 modified "2023-09-25" @default.
• W2071079746 title "Test solution for data retention faults in low-power SRAMs" @default.
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• W2071079746 doi "https://doi.org/10.5555/2485288.2485394" @default.
• W2071079746 hasPublicationYear "2013" @default.
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