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- W2071706588 abstract "We propose a new PLC design for a 43 Gb/s DQPSK demodulator. The design reduces both the module size and the power consumption without degrading any of the module characteristics." @default.
- W2071706588 created "2016-06-24" @default.
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- W2071706588 date "2008-01-01" @default.
- W2071706588 modified "2023-10-16" @default.
- W2071706588 title "Compact DQPSK demodulator with interwoven double Mach-Zehnder interferometer using planar lightwave circuit" @default.
- W2071706588 cites W2035670980 @default.
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- W2071706588 doi "https://doi.org/10.1109/ecoc.2008.4729120" @default.
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