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• W2071726591 abstract "Dynamic code generation techniques are useful if the benefit of code specialized to values only known at runtime outweighs generation time. Such techniques are increasingly employed for HPC applications to tune their runtime behavior. The simulation software investigated in this paper is a typical example: It spends a significant portion of computing time evaluating symbolic formulas which are set up dynamically from model data. However, any software tuning has to match the hardware. Due to the so-called power wall, HPC systems are increasingly equipped with throughput-oriented accelerator components, to allow for rising performance as known from Top500 history. To best exploit such systems, it is important to understand how well applications map to heterogeneous components. While dynamic code generation can work well for standard multi-core systems, in this paper, we research the benefit of accelerators for this scenario. For our application we show that - while the generated code runs well on the accelerator - the generation itself has serious issues, and much better maps to standard multi-cores. Therefore, we see the need that coming HPC systems still have to be equipped with a significant portion of latency-oriented, thus complex general-purpose hardware." @default.
• W2071726591 created "2016-06-24" @default.
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• W2071726591 date "2013-10-01" @default.
• W2071726591 modified "2023-09-23" @default.
• W2071726591 title "Expression Tree Evaluation by Dynamic Code Generation - Are Accelerators Up for the Task?" @default.
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• W2071726591 doi "https://doi.org/10.1109/icpp.2013.32" @default.
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