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- W2072615064 abstract "In this study, a fully integrated Phase-locked loop (PLL) that is applicable to Universal Flash Storage (UFS) systems is presented. The fully integrated PLL is realized using a MOS capacitor as an on-chip loop filter (LF). To compensate for leakage current in the LF, a leakage current compensation scheme is presented. With the leakage compensation scheme, the peak-to-peak jitter and rms jitter are 40ps and 7.62ps, respectively. The area of the LF was reduced by around a sixteenth part compared with a metal insulator metal (MIM) capacitor." @default.
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- W2072615064 date "2015-01-01" @default.
- W2072615064 modified "2023-09-27" @default.
- W2072615064 title "A fully integrated Phase-locked loop with leakage current compensation in 65-nm CMOS technology" @default.
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- W2072615064 doi "https://doi.org/10.1109/icce.2015.7066538" @default.
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