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- W2072736149 abstract "Self-timed circuits present an attractive solution to the problem of process variation. However, implementing self-timed combinational logic is complex and expensive. In particular, mapping large function blocks into cell-libraries is difficult as decomposing gates introduces new signals which may violate indication. This paper presents a novel method for implementing any m-of-n encoded function block using bounded gates, where any gate may be decomposed without violating indication. This is achieved by successively decomposing the input encoding into smaller m-of-n codes. The method described in the paper uses algebraic extraction techniques to efficiently determine and quantify potential re-encodings. The results of the synthesis procedure are demonstrated on a range of combinational function blocks." @default.
- W2072736149 created "2016-06-24" @default.
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- W2072736149 date "2010-01-01" @default.
- W2072736149 modified "2023-09-23" @default.
- W2072736149 title "M-of-N Code Decomposition for Indicating Combinational Logic" @default.
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- W2072736149 doi "https://doi.org/10.1109/async.2010.12" @default.
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