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- W2072976978 abstract "Reversible logic has applications in low-power computing and quantum computing. However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. In this article, we propose a resource-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. [2011]. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (reversible leading zero counter) and converter, we have reduced the cost by about 68%. We also propose quantum designs adapted to use gates from fault-tolerant libraries. The KQ for our fault-tolerant design is almost 60 times as expensive as for a 32-bit fixed-point addition. We note that the floating-point representation makes in-place, truly reversible arithmetic impossible, requiring us to retain both inputs, which limits the sustainability of its use for quantum computation." @default.
- W2072976978 created "2016-06-24" @default.
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- W2072976978 date "2014-11-18" @default.
- W2072976978 modified "2023-09-29" @default.
- W2072976978 title "A Resource-Efficient Design for a Reversible Floating Point Adder in Quantum Computing" @default.
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- W2072976978 doi "https://doi.org/10.1145/2629525" @default.
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