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- W2076220049 abstract "A 16.8Gbps/channel single ended transceiver for SiP based DRAM interface on silicon carrier channel is presented. A transmitter, receiver, and channel are all included in a single package. On the transmitter, 1 tap FFEs are used in 4:1 MUX and in output driver. On the receiver, source follower based CTLEs and self Vref generator are used for obtaining effective single ended signaling on Si-carrier channel. A BER that is less than 1e-12 is achieved in 65nm CMOS. The power efficiency of the transceiver is 5.9pJ/bit with 120Ω terminations at each transceiver side." @default.
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- W2076220049 date "2014-11-01" @default.
- W2076220049 modified "2023-10-11" @default.
- W2076220049 title "A 16.8Gbps/channel single-ended transceiver in 65nm CMOS for SiP based DRAM interface on Si-carrier channel" @default.
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- W2076220049 doi "https://doi.org/10.1109/asscc.2014.7008876" @default.
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