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- W2076767128 abstract "The MOSIS VLSI IC process has been characterized for picosecond single-event transients for large-area diode test structures. Three test structures were designed for a CMOS, p-well, 3- mu m process, including two MOS diodes for SEU transient measurements. Devices were irradiated with 5-MeV boron ions and 5-MeV alpha -particles. Bulk CMOS single-event transients are found to exhibit a wide variety of electrical interactions when the devices are irradiated, owing to complex technology profiles and multijunction effects. The transients characterized in this work can be used to simulate single-event upsets in SRAM (static RAM) circuits.< <ETX xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>></ETX>" @default.
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- W2076767128 date "1989-12-01" @default.
- W2076767128 modified "2023-09-23" @default.
- W2076767128 title "CMOS VLSI single event transient characterization" @default.
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- W2076767128 doi "https://doi.org/10.1109/23.45437" @default.
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