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- W2077164538 abstract "The gate leakage current which influences the charge hold time of flash memories is characterized as very localized in tunnel oxide area. And the leakage current value is relatively low as the quantity of the current. In conventional test-element-group (TEG) for evaluation of this leakage current, the gate leakage current is measured in relatively large area capacitors or transistors, as a result, the localized and low gate leakage current cannot be measured. In this paper, we propose the new concept TEG in which the localized gate leakage current corresponding to the bit error in the flash memory can be measured in short time. We statistically evaluated the stress induced leakage current (SILC) of all cells in very low gate leakage current region (about 10-16 A) in the very short time (a few seconds) and easily confirmed and categorized the localized cells with the large SILC after the stress. In addition, we show that plasma oxynitridation using Kr/O2/NO gases is effective in suppressing the anomalous SILC and carrier traps by statistically evaluation of 60,000 cells in proposed array TEG." @default.
- W2077164538 created "2016-06-24" @default.
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- W2077164538 date "2007-04-24" @default.
- W2077164538 modified "2023-09-23" @default.
- W2077164538 title "Very Low Bit Error Rate in Flash Memory Using Tunnel Dielectrics Formed by Kr/O<sub>2</sub>/NO Plasma Oxynitridation" @default.
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- W2077164538 doi "https://doi.org/10.1143/jjap.46.2148" @default.
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