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- W2078688764 abstract "Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhanced support for dynamic and partial reconfigurability. Design automation support for partial reconfigurability includes several key challenges. In particular, reconfiguration algorithms need to be developed to effectively exploit the available area and run-time reconfiguration support for instantiating at run-time the hardware components needed to execute multiple applications concurrently. These new algorithms must be able to achieve maximum application execution performance at a minimum reconfiguration overhead.In this work, we propose a novel design flow that minimizes the amount of core reconfigurations needed to map multiple applications dynamically (i.e., using run-time reconfiguration) on FPGAs. This new mapping flow features a multi-stage design optimization algorithm that makes it possible to reduce the reconfiguration latency up to 43%, by taking into account the reconfiguration costs and SoC block reuse between the different applications that need to be executed dynamically on the FPGA. Moreover, we show that the proposed multi-stage optimization algorithm explores a large set of mapping trade-offs, by taking into account the traffic flows for each application, the run-time reconfiguration costs and the number of reconfigurable regions available on the FPGA." @default.
- W2078688764 created "2016-06-24" @default.
- W2078688764 creator A5001171507 @default.
- W2078688764 creator A5014181688 @default.
- W2078688764 creator A5036407549 @default.
- W2078688764 creator A5062883620 @default.
- W2078688764 creator A5074236306 @default.
- W2078688764 creator A5077839627 @default.
- W2078688764 date "2009-10-11" @default.
- W2078688764 modified "2023-10-06" @default.
- W2078688764 title "Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems" @default.
- W2078688764 cites W1547315652 @default.
- W2078688764 cites W1973011394 @default.
- W2078688764 cites W1991497933 @default.
- W2078688764 cites W2079308193 @default.
- W2078688764 cites W2118953734 @default.
- W2078688764 cites W2120989188 @default.
- W2078688764 cites W2121791993 @default.
- W2078688764 cites W2121856707 @default.
- W2078688764 cites W2136261407 @default.
- W2078688764 cites W2164318682 @default.
- W2078688764 doi "https://doi.org/10.1145/1629435.1629480" @default.
- W2078688764 hasPublicationYear "2009" @default.
- W2078688764 type Work @default.
- W2078688764 sameAs 2078688764 @default.
- W2078688764 citedByCount "18" @default.
- W2078688764 countsByYear W20786887642012 @default.
- W2078688764 countsByYear W20786887642013 @default.
- W2078688764 countsByYear W20786887642014 @default.
- W2078688764 countsByYear W20786887642017 @default.
- W2078688764 countsByYear W20786887642018 @default.
- W2078688764 countsByYear W20786887642020 @default.
- W2078688764 countsByYear W20786887642023 @default.
- W2078688764 crossrefType "proceedings-article" @default.
- W2078688764 hasAuthorship W2078688764A5001171507 @default.
- W2078688764 hasAuthorship W2078688764A5014181688 @default.
- W2078688764 hasAuthorship W2078688764A5036407549 @default.
- W2078688764 hasAuthorship W2078688764A5062883620 @default.
- W2078688764 hasAuthorship W2078688764A5074236306 @default.
- W2078688764 hasAuthorship W2078688764A5077839627 @default.
- W2078688764 hasBestOaLocation W20786887642 @default.
- W2078688764 hasConcept C118524514 @default.
- W2078688764 hasConcept C119701452 @default.
- W2078688764 hasConcept C147764199 @default.
- W2078688764 hasConcept C149635348 @default.
- W2078688764 hasConcept C199360897 @default.
- W2078688764 hasConcept C41008148 @default.
- W2078688764 hasConcept C42935608 @default.
- W2078688764 hasConcept C76155785 @default.
- W2078688764 hasConcept C79403827 @default.
- W2078688764 hasConcept C82876162 @default.
- W2078688764 hasConceptScore W2078688764C118524514 @default.
- W2078688764 hasConceptScore W2078688764C119701452 @default.
- W2078688764 hasConceptScore W2078688764C147764199 @default.
- W2078688764 hasConceptScore W2078688764C149635348 @default.
- W2078688764 hasConceptScore W2078688764C199360897 @default.
- W2078688764 hasConceptScore W2078688764C41008148 @default.
- W2078688764 hasConceptScore W2078688764C42935608 @default.
- W2078688764 hasConceptScore W2078688764C76155785 @default.
- W2078688764 hasConceptScore W2078688764C79403827 @default.
- W2078688764 hasConceptScore W2078688764C82876162 @default.
- W2078688764 hasLocation W20786887641 @default.
- W2078688764 hasLocation W20786887642 @default.
- W2078688764 hasOpenAccess W2078688764 @default.
- W2078688764 hasPrimaryLocation W20786887641 @default.
- W2078688764 hasRelatedWork W1518009538 @default.
- W2078688764 hasRelatedWork W2011469574 @default.
- W2078688764 hasRelatedWork W2045583347 @default.
- W2078688764 hasRelatedWork W2147614424 @default.
- W2078688764 hasRelatedWork W2150194641 @default.
- W2078688764 hasRelatedWork W2913355112 @default.
- W2078688764 hasRelatedWork W2930684676 @default.
- W2078688764 hasRelatedWork W4239107643 @default.
- W2078688764 hasRelatedWork W4281927116 @default.
- W2078688764 hasRelatedWork W4308084229 @default.
- W2078688764 isParatext "false" @default.
- W2078688764 isRetracted "false" @default.
- W2078688764 magId "2078688764" @default.
- W2078688764 workType "article" @default.