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- W2078996421 abstract "A formation technology of ultra-low series resistance CMOS source/drain (S/D) electrodes is developed. The silicide/silicon contact resistivity (R <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>c</sub> ) of 8.0×10 <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>-10</sup> Ω·cm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> and the electrode's sheet resistance (R <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>sheet</sub> ) of less than 5.0 Ω/□ are achieved for both n- and pMOS using W/ErSi <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> and W/Pd <sub xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sub> Si metal stacked silicide structures. For the first time, FD-SOI CMOS with the developed S/D electrodes was fabricated and the ring oscillator speed performance was evaluated." @default.
- W2078996421 created "2016-06-24" @default.
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- W2078996421 date "2010-12-01" @default.
- W2078996421 modified "2023-09-25" @default.
- W2078996421 title "Ultra-low series resistance W/ErSi<inf>2</inf>/n<sup>+</sup>-Si and W/Pd<inf>2</inf>Si/p<sup>+</sup>-Si S/D electrodes for advanced CMOS platform" @default.
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- W2078996421 doi "https://doi.org/10.1109/iedm.2010.5703425" @default.
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