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• W2080010366 abstract "Abstract In this paper the extensions of our analogue fault simulator ‘aFSIM’ to a multi-level hierarchical analogue fault simulation tool are described. Due to these extensions it is now possible to fault-simulate larger analogue circuits. In addition mixed-signal circuits including a not too large amount of digital circuitry can also be fault-simulated. The term ‘multi-level hierarchical analogue fault simulation’ comprises the usage of behavioural models for components together with components described at the transistor-level, fault injection at different abstraction levels, and a hierarchically handling of both different descriptions of the circuit components and faults during the fault simulation process. Multi-level hierarchical analogue fault simulation is an important means to tackle the complexity of analogue circuits for providing test signals with a high fault and defect coverage." @default.
• W2080010366 created "2016-06-24" @default.
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• W2080010366 date "2002-10-01" @default.
• W2080010366 modified "2023-09-24" @default.
• W2080010366 title "Multi-level hierarchical analogue fault simulation" @default.
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• W2080010366 doi "https://doi.org/10.1016/s0026-2692(02)00099-x" @default.
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