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- W2080470889 abstract "The effect of processing on the generation of interface states and bulk states is analyzed in MOS structures. Simple process steps are simulated by postoxidation annealing in nitrogen ambient at temperatures in the range . Interface‐state and bulk‐trap densities are measured by constant capacitance DLTS. Interface and bulk states are strongly generated at anneal temperatures below 900°C. The interface‐state density changes from a distribution showing a gradual decrease from the conduction bandedge to a distribution having a broad maximum near midgap. For the bulk traps at energy , the density steeply increases within 100 nm from the interface. Densities up to are measured after 600°C annealing." @default.
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- W2080470889 date "1985-09-01" @default.
- W2080470889 modified "2023-09-25" @default.
- W2080470889 title "Process‐Induced Interface and Bulk States in MOS Structures" @default.
- W2080470889 doi "https://doi.org/10.1149/1.2114319" @default.
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