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- W2080775195 abstract "This paper describes a precision capacitively-coupled chopper instrumentation amplifier (CCIA). It achieves 1μV offset, 134dB CMRR, 120dB PSRR, 0.16% gain accuracy and a noise efficiency factor (NEF) of 3.1, which is more than 3x better than state-of-the-art. It has a rail-to-rail DC common-mode (CM) input range. Furthermore, a positive feedback loop (PFL) is used to boost the input impedance, and a ripple reduction loop (RRL) is used to reduce the ripple associated with chopping. The CCIA occupies only 0.1mm <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>2</sup> in a 65nm CMOS technology. It can operate from a 1V supply, from which it draws only 1.8μA." @default.
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- W2080775195 date "2010-09-01" @default.
- W2080775195 modified "2023-09-29" @default.
- W2080775195 title "A 1.8µW 1µV-offset capacitively-coupled chopper instrumentation amplifier in 65nm CMOS" @default.
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- W2080775195 doi "https://doi.org/10.1109/esscirc.2010.5619902" @default.
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