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• W2082001923 abstract "With decreasing circuit lithography dimensions and increasing memory densities, an SEU may affect multiple adjacent memory cells. This paper presents an SEU hardened memory using error correction code that can correct single errors, double-adjacent errors, triple-adjacent errors and double-almost-adjacent errors. The proposed memory introduces small area, power and delay overheads." @default.
• W2082001923 created "2016-06-24" @default.
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• W2082001923 date "2012-02-01" @default.
• W2082001923 modified "2023-09-26" @default.
• W2082001923 title "SEU Tolerant Memory Using Error Correction Code" @default.
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• W2082001923 doi "https://doi.org/10.1109/tns.2011.2176513" @default.
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