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- W2086765836 abstract "Abstract This study investigates a two-dimensional folded Hall device fabricated by standard 0.35-μm CMOS process. The effective conduction length is shortened by folding the device, and the conducting channel is narrowed by using a p + guard ring. The measurement results show that the maximum supply-current-related magnetosensitivity ( S RI ) of lateral magnetotransistor (LMT) integrated with magnetoresistor (MR) is about 5 and 7 times higher than that of singular LMT and singular MR, respectively. Cross-coupling signal is also higher but is easily cancelled since the signal is approximately one fifth of the related measured Hall voltage. Both MR and LMT have poor nonlinearity, especially for two opposing extremes at I bias ≤ 20 mA and I bias ≥ 80 mA. Integrating LMT with MR improves nonlinearity by reducing the total conductive resistance V bias / I bias . The measured optimum S RI , optimum sensitivity S , minimum nonlinearity error (NLE) and minimum offset are 0.385 V/AT, 9.564 mV/T, 4.03%, and 18.85 mV, respectively, at a bias current of 100 mA excited with a supply voltage of 2.7 V." @default.
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- W2086765836 date "2012-08-01" @default.
- W2086765836 modified "2023-10-03" @default.
- W2086765836 title "Two-dimensional folded CMOS Hall device with interacting lateral magnetotransistor and magnetoresistor" @default.
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- W2086765836 doi "https://doi.org/10.1016/j.sna.2012.04.039" @default.
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