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• W2088084080 abstract "A hybrid double-floating-gate flexible memory device by utilizing an rGO-sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge-trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field-effect-transistor (FET) and memory characteristics." @default.
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• W2088084080 date "2012-11-05" @default.
• W2088084080 modified "2023-10-16" @default.
• W2088084080 title "Layer-by-Layer-Assembled Reduced Graphene Oxide/Gold Nanoparticle Hybrid Double-Floating-Gate Structure for Low-Voltage Flexible Flash Memory" @default.
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• W2088084080 doi "https://doi.org/10.1002/adma.201203509" @default.
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