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W2089257382 abstract "We have demonstrated a digital receiver performing direct digitization of radio-frequency signals over a wide frequency range from kilohertz to gigahertz. The complete system, consisting of a cryopackaged superconductor all-digital receiver (ADR) chip followed by room-temperature interface electronics and a field programmable gate array (FPGA) based post-processing module, has been developed. The ADR chip comprises a low-pass analog-to-digital converter (ADC) delta modulator with phase modulation–demodulation architecture together with digital in-phase and quadrature mixer and a pair of digital decimation filters. The chip is fabricated using a 4.5 kA cm−2 process and is cryopackaged using a commercial-off-the-shelf cryocooler. Experimental results in HF, VHF, UHF and L bands and their analysis, proving consistent operation of the cryopackaged ADR chip up to 24.32 GHz clock frequency, are presented and discussed." @default.
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W2089257382 date "2007-10-18" @default.
W2089257382 modified "2023-10-01" @default.
W2089257382 title "Cryocooled wideband digital channelizing radio-frequency receiver based on low-pass ADC" @default.
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W2089257382 doi "https://doi.org/10.1088/0953-2048/20/11/s05" @default.
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