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- W2089801617 abstract "A method for reducing the hardware amount in the circuit of compositional microprogramming control unit with common memory oriented to FPGA technology is proposed . The restrictions of LUT’s input number are taken into account. The method is based on the use of two sources of codes classes of pseudoequivalent operational linear chain and use a multiplexer to choose one of these sources. Also the surplus of FPGA’s embedded memory blocks is used. Such an approach would reduce the number of LUT elements in the addressing subcircuit of compositional microprogramming control unit, that leads to reducing of common hardware amount and price of the unit. An example of the proposed method application is given." @default.
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- W2089801617 date "2013-02-03" @default.
- W2089801617 modified "2023-09-25" @default.
- W2089801617 title "OPTIMIZATION OF COMPOSITIONAL MICROPROGRAMMING CONTROL UNIT WITH COMMON MEMORY" @default.
- W2089801617 cites W1879501201 @default.
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- W2089801617 doi "https://doi.org/10.15588/1607-3274-2014-1-20" @default.
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