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• W2091011471 abstract "Custom instructions are commonly used to meet the strict design constraints in high performance systems. This paper extends the application space of our previously proposed FPGA-aware custom instruction enumeration and selection technique for area-constrained designs that maximizes the logic utilization of the available FPGA space. Results indicate a factor of 4 improvement in cycle savings over conventional selection techniques and an average runtime reduction of over 31% and 50% in the enumeration and selection phases respectively." @default.
• W2091011471 created "2016-06-24" @default.
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• W2091011471 date "2011-09-01" @default.
• W2091011471 modified "2023-09-26" @default.
• W2091011471 title "Instruction set customization for area-constrained FPGA designs" @default.
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• W2091011471 doi "https://doi.org/10.1109/socc.2011.6085114" @default.
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