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Matches in SemOpenAlex for { <https://semopenalex.org/work/W2092572009> ?p ?o ?g. }

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• W2092572009 abstract "This paper presents a design for testability technique to avoid scan shift failure due to flip-flop simultaneous triggering. The proposed technique changes test clock domains of flip-flops in the regions where severe IR-drop problems occur. A massive parallel algorithm using a graphic processor unit is adopted to speed up the IR-drop simulation during optimization. The experimental data on large benchmark circuits show that peak IR-drop values are reduced by 15% on average compared with the circuit after simple MD-SCAN partition. Our proposed technique quickly optimizes a half-million-gate design within two hours." @default.
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• W2092572009 date "2013-04-01" @default.
• W2092572009 modified "2023-10-10" @default.
• W2092572009 title "Test Clock Domain Optimization to Avoid Scan Shift Failure Due to Flip-Flop Simultaneous Triggering" @default.
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• W2092572009 doi "https://doi.org/10.1109/tcad.2012.2228741" @default.
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