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• W2093747928 abstract "We propose and implement a promising fabrication technology for geometrically well-defined single-electron transistors based on a silicon-on-insulator quantum wire and side-wall depletion gates. The 30-nm-wide silicon quantum wire is defined by a combination of conventional photolithography and process technology, called a side-wall patterning method, and depletion gates for two tunnel junctions are formed by the doped polycrystalline silicon sidewall. The good uniformity of the wire suppresses unexpected potential barriers. The fabricated device shows clear single-electron tunneling phenomena by an electrostatically defined single island at liquid nitrogen temperature and insensitivity of the Coulomb oscillation period to gate bias conditions." @default.
• W2093747928 created "2016-06-24" @default.
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• W2093747928 date "2001-12-03" @default.
• W2093747928 modified "2023-10-14" @default.
• W2093747928 title "Single-electron transistor based on a silicon-on-insulator quantum wire fabricated by a side-wall patterning method" @default.
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• W2093747928 doi "https://doi.org/10.1063/1.1421081" @default.
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