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- W2094084340 abstract "In ultra-thin-SOI MOSFET, especially in fully depleted operation, threshold voltage is strongly affected by SOI thickness in addition to dopant concentration. For instance, 5 % of tolerance is proposed in ITRS2001. This paper discusses the SOI thickness uniformity in various periods of undulations, especially focusing on ELTRAN SOI-Epi wafers, that is formed by bonding of epitaxial layer on porous Si, splitting, etching back of porous Si, and final Hz annealing to smooth the SOI surface." @default.
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- W2094084340 date "2002-01-01" @default.
- W2094084340 modified "2023-09-26" @default.
- W2094084340 title "Precise thickness control for ultra-thin SOI in ELTRAN/spl reg/ SOI-Epi/spl trade/ wafer" @default.
- W2094084340 cites W1974162610 @default.
- W2094084340 doi "https://doi.org/10.1109/soi.2002.1044479" @default.
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