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• W2094647593 abstract "A memristive operation mode of a single floating gate transistor is presented. The device resistance varied accordingly to the charge flow through the device. Hysteretic current-voltages including a resistance storage capability were observed. These experimental findings are theoretically supported by a capacitive based model. The presented two-terminal MemFlash-cell can be considered as a potential substitute for any memristive device (especially for reconfigurable logic, cross-bar arrays, and neuromorphic circuits) and is basically compatible with current Si-fabrication technology. The obvious trade-off between a memristive device based on a state-of-the-art silicon process technology and power consumption concerns will be discussed." @default.
• W2094647593 created "2016-06-24" @default.
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• W2094647593 date "2012-12-24" @default.
• W2094647593 modified "2023-10-14" @default.
• W2094647593 title "Memristive operation mode of floating gate transistors: A two-terminal MemFlash-cell" @default.
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• W2094647593 doi "https://doi.org/10.1063/1.4773300" @default.
• W2094647593 hasPublicationYear "2012" @default.
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