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- W2094673367 abstract "This paper presents a fully integrated reconfigurable all-band RF receiver for GPS/GLONASS/Galileo/Compass in 55 nm CMOS. The receiver incorporates two RF front-ends and two IF channels (IFC) to process any two GNSS signals. A switching module (SWM) is integrated to provide the connectivity between different RF front-end and IFC, which will effectively simplify the design complexity of the IFC and save power consumption. A flexible frequency planning with two frequency synthesizers is utilized to achieve the reception of any two GNSS signals. Several digitally-assisted calibration modules are integrated to ensure that the chip performance only shows a weak PVT dependence. While drawing about 26–29.2 mA per channel from a 1.2 V supply, this RF receiver achieve an image rejection ratio (IMRR) of more than 49 dB, an automatic gain control (AGC) range of 88 dB, and an input-referred 1 dB compression point (IP1dB) of better than −25 dBm with a noise figure (NF) of about 2 dB. The whole receiver consumes an active die area of about 3.5 mm2." @default.
- W2094673367 created "2016-06-24" @default.
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- W2094673367 date "2014-12-01" @default.
- W2094673367 modified "2023-10-14" @default.
- W2094673367 title "Reconfigurable All-band GNSS RF CMOS receiver" @default.
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- W2094673367 doi "https://doi.org/10.1109/icecs.2014.7049960" @default.
- W2094673367 hasPublicationYear "2014" @default.
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