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Matches in SemOpenAlex for { <https://semopenalex.org/work/W2095704856> ?p ?o ?g. }

• W2095704856 abstract "A method for formation and control of silicon gates or fins uses trim of a hard mask by a new gaseous oxide etch. The method decouples final feature size from lithography and from the RIE resist trim/oxide mask open processes. Logic blocks with two separately controlled gate lengths and dielectric thicknesses are embedded on chip. COR control has achieved final size sprads of 1 to 2 nm using measurements from either the factory CDSEM or from a scatterometer integrated on the process tool." @default.
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• W2095704856 date "2004-09-07" @default.
• W2095704856 modified "2023-09-27" @default.
• W2095704856 title "Trimming of hard-masks by gaseous Chemical Oxide Removal (COR) for sub-10 nm gates/fins, for gate length control and for embedded logic" @default.
• W2095704856 cites W2065370362 @default.
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• W2095704856 doi "https://doi.org/10.1109/asmc.2004.1309536" @default.
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