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- W2095954771 abstract "Simulated annealing has became the de facto standard for FPGA placement engines since it provides high quality solutions and is robust under a wide range of objective functions. However, this method will soon become prohibitive due to its sequential nature and since the performance of single-core processor has stagnated. General purpose computing on graphics processing units (GPGPU) offers a promising solution to improve runtime with only commodity hardware. In this work, we develop a highly parallel approach to simulated annealing-based placement using GPGPU. We identify the challenges posed by the GPU architecture and describe effective solutions. An average speedup of about 10x was achieved over conventional placement within 3% of wirelength." @default.
- W2095954771 created "2016-06-24" @default.
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- W2095954771 date "2010-08-01" @default.
- W2095954771 modified "2023-09-23" @default.
- W2095954771 title "Parallelizing Simulated Annealing-Based Placement Using GPGPU" @default.
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- W2095954771 doi "https://doi.org/10.1109/fpl.2010.17" @default.
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