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- W2096543195 abstract "An optical receiver designed and fabricated in 0.25μm ultra-thin silicon (UTSi) on sapphire technology is flip-chip integrated with p-i-n photodiodes. The receiver includes a transimpedance amplifier (TIA), limiting amplifiers (LA), and an output buffer. The power consumption of the TIA and limiting amplifiers is 67.3 mW. The receiver is shown operating with a gain of 57 dBΩ at a bit rate of 10 Gb/s. The measured sensitivity is −1.7 dBm for a bit error rate of 10 <sup xmlns:mml=http://www.w3.org/1998/Math/MathML xmlns:xlink=http://www.w3.org/1999/xlink>−9</sup> . This is the first 0.25μm CMOS TIA and LA codesign that operates optically at 10 Gb/s." @default.
- W2096543195 created "2016-06-24" @default.
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- W2096543195 date "2008-05-01" @default.
- W2096543195 modified "2023-10-03" @default.
- W2096543195 title "A 10 Gb/s optical receiver in 0.25 μm silicon-on-sapphire CMOS" @default.
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- W2096543195 doi "https://doi.org/10.1109/iscas.2008.4541387" @default.
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