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- W2096784653 abstract "Symbolic analog-circuit analysis has many applications, and is especially useful for analog synthesis and testability analysis. In this paper, we present a new approach to exact and canonical symbolic analysis by exploiting the sparsity and sharing of product terms. It consists of representing the symbolic determinant of a circuit matrix by a graph---called determinant decision diagram (DDD)---and performing symbolic analysis by graph manipulations. We showed that DDD construction and DDD-based symbolic analysis can be performed in time complexity proportional to the number of DDD vertices. We described a vertex ordering heuristic, and showed that the number of DDD vertices can be quite small --- usually orders-of-magnitude less than the number of product terms. The algorithm has been implemented. An order-of-magnitude improvement in both CPU time and memory usages over existing symbolic analyzers ISAAC and Maple-V has been observed for large analog circuits." @default.
- W2096784653 created "2016-06-24" @default.
- W2096784653 creator A5003998448 @default.
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- W2096784653 date "1997-11-13" @default.
- W2096784653 modified "2023-09-24" @default.
- W2096784653 title "Symbolic analysis of large analog circuits with determinant decision diagrams" @default.
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- W2096784653 doi "https://doi.org/10.5555/266388.266510" @default.
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