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- W2097032051 abstract "Double patterning lithography (DPL) is a likely resolution enhancement technique for IC production in 32nm and below technology nodes. However, DPL gives rise to two independent, uncorrelated distributions of linewidth on a chip, resulting in a 'bimodal' linewidth distribution and an increase in performance variation. [13] suggested that new physical design mechanisms could reduce harmful covariance terms that contribute to this performance variation." @default.
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- W2097032051 date "2009-11-02" @default.
- W2097032051 modified "2023-09-23" @default.
- W2097032051 title "Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography" @default.
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- W2097032051 doi "https://doi.org/10.1145/1687399.1687512" @default.
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