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• W2097296595 abstract "This paper examines the architecture, design, and test of continuous-time tunable intermediate-frequency (IF) fourth-order bandpass delta-sigma (BP /spl Delta//spl Sigma/) modulators. Bandpass modulators sampling at high IFs (/spl sim/100 MHz) allow direct sampling of the RF signal-reducing analog hardware and make it easier to realize completely software programmable receivers. This paper presents circuit design of and test results from continuous-time fourth-order BP /spl Delta//spl Sigma/ modulators fabricated in AlInAs/GaInAs heterojunction bipolar technology with a peak unity current gain cutoff frequency (f/sub T/) of 80 GHz and a maximum frequency of oscillation (f/sub MAX/) of about 130 GHz. Operating from /spl plusmn/5-V power supplies, a fabricated 180-MHz IF fourth-order /spl Delta//spl Sigma/ modulator sampling at 4 GS/s demonstrates stable behavior and achieves 75.8 dB of signal-to-(noise+distortion)-ratio (SNDR) over a 1-MHz bandwidth. Narrowband performance (/spl sim/1 MHz) performance of these modulators is limited by thermal/device noise while broadband performance (/spl sim/60 MHz), is limited by quantization noise. The high sampling frequency (4 GS/s) in this converter is dictated by broadband (60 MHz) performance requirements." @default.
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• W2097296595 date "2001-01-01" @default.
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• W2097296595 title "Architecture, design, and test of continuous-time tunable intermediate-frequency bandpass delta-sigma modulators" @default.
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• W2097296595 doi "https://doi.org/10.1109/4.896223" @default.
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