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• W2097638226 startingPage "318" @default.
• W2097638226 abstract "A low-power 10-bit converter that can sample input frequencies above 100 MHz is presented. The converter consumes 55 mW when sampling at f/sub s/=40 MHz from a 3-V supply, which also includes a bandgap and a reference circuit (70 mW if including digital drivers with a 10-pF load). It exhibits higher than 9.5 effective number of bits for an input frequency at Nyquist (f/sub in/=f/sub s//2=20 MHz). The differential and integral nonlinearity of the converter are within /spl plusmn/0.3 and /spl plusmn/0.75 LSB, respectively, when sampling at 40 MHz, and improve to a 12-bit accuracy level for lower sampling rates. The overall performance is achieved using a pipelined architecture without a dedicated sample/hold amplifier circuit at the input. The converter is implemented in double-poly, triple-metal 0.35-/spl mu/m CMOS technology and occupies an area of 2.6 mm/sup 2/." @default.
• W2097638226 created "2016-06-24" @default.
• W2097638226 creator A5065014991 @default.
• W2097638226 creator A5083723926 @default.
• W2097638226 date "2000-03-01" @default.
• W2097638226 modified "2023-09-23" @default.
• W2097638226 title "A 55-mW, 10-bit, 40-Msample/s Nyquist-rate CMOS ADC" @default.
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• W2097638226 doi "https://doi.org/10.1109/4.826813" @default.
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