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• W2098033903 abstract "This paper presents the hardware implementation of an algorithm developed to provide automatic motion detection and object tracking functionality embedded within intelligent CCTV systems. The implementation is targeted at an Altera Stratix FPGA making full use of the dedicated DSP resource. The Altera Nios embedded processor provides a platform for the tracking control loop and generic pan tilt zoom camera interface. This paper details the explicit functional stages of the algorithm that lend themselves to an optimised pipelined hardware implementation. This implementation provides maximum data throughput, providing real-time operation of the described algorithm, and enables a moving camera to track a moving object in real time" @default.
• W2098033903 created "2016-06-24" @default.
• W2098033903 creator A5068862924 @default.
• W2098033903 date "2006-08-01" @default.
• W2098033903 modified "2023-09-26" @default.
• W2098033903 title "An FPGA Implementation of Hierarchical Motion Estimation for Embedded Object Tracking" @default.
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• W2098033903 doi "https://doi.org/10.1109/isspit.2006.270805" @default.
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