FRINK Linked Data Fragments server

Matches in SemOpenAlex for { <https://semopenalex.org/work/W2098515451> ?p ?o ?g. }

• W2098515451 endingPage "13" @default.
• W2098515451 startingPage "11" @default.
• W2098515451 abstract "System on Chip (SoC) designs inherit all the well known verification and validation difficulties associated with complex ASIC designs, besides adding their own set of newer problems. These arise because SoCs are primarily implemented by re-using Intellectual Property (IP) cores. It is well known that verification today constitutes about 70% to 80% of the total design effort, thereby, making it the most expensive component in terms of cost and time, in the entire design flow. It is expected to get even worse for SoC designs. In a complex SoC design flow functional verification is very important; any behavioral or functional bug escaping this phase will not be detected in the subsequent implementation phases and will surface only after the first silicon is integrated into the target system, resulting in costly design and silicon iterations. A number of academic and industrial research laboratories have been carrying out research on functional verification of SoCs based on different approaches. Partial success has been achieved in deploying them. Many of the issues relate to intrinsic limitations of some of the approaches taken; while others have to do with the quality of the design information, by way of, design descriptions, design documentations and design specifications, from which the overall verification objectives are derived. SoCs have brought to focus the need to carry out design and verification concurrently. For the design and verification task to proceed concurrently there is a need to capture formally, design information and implementation details at various levels of abstraction. Another reason for the need to formalize is that, as designs become more complex, functional verification will have to be carried out using the divide and conquer approach.We discuss several approaches based on compositional verification. For these approaches to succeed, specifications of either, the individual modules, or individual IPs, if any are used, have to be stated formally. There exist several commercial offerings addressing the area of SoC functional verification. Most of these use some form of divide and conquer approach related to compositional verification. The basis of success of some of these tools lies in the fact that the specifications of the IP cores are in essence captured in some executable form, be they formal specification languages, or commonly used HDLs suitably modified for the purpose.This tutorial is structured to provide information on the state of the art in the area of functional verification. It will focus on existing methodologies, tools, and practical approaches based on universal simulation, emulation, formal verification, and semi-formal verification that can be employed to overcome the SoC verification problem. We discuss a number of real life verification projects, describing the various techniques used and the effectiveness of these techniques. We conclude the tutorial by presenting issues, which form the current focus for research." @default.
• W2098515451 created "2016-06-24" @default.
• W2098515451 creator A5020532266 @default.
• W2098515451 creator A5071377613 @default.
• W2098515451 creator A5081333705 @default.
• W2098515451 creator A5087997458 @default.
• W2098515451 creator A5089236765 @default.
• W2098515451 date "2002-01-07" @default.
• W2098515451 modified "2023-09-27" @default.
• W2098515451 title "Functional Verification of System on Chips-Practices, Issues and Challenges" @default.
• W2098515451 doi "https://doi.org/10.5555/832284.835415" @default.
• W2098515451 hasPublicationYear "2002" @default.
• W2098515451 type Work @default.
• W2098515451 sameAs 2098515451 @default.
• W2098515451 citedByCount "5" @default.
• W2098515451 countsByYear W20985154512017 @default.
• W2098515451 crossrefType "proceedings-article" @default.
• W2098515451 hasAuthorship W2098515451A5020532266 @default.
• W2098515451 hasAuthorship W2098515451A5071377613 @default.
• W2098515451 hasAuthorship W2098515451A5081333705 @default.
• W2098515451 hasAuthorship W2098515451A5087997458 @default.
• W2098515451 hasAuthorship W2098515451A5089236765 @default.
• W2098515451 hasConcept C111498074 @default.
• W2098515451 hasConcept C115903868 @default.
• W2098515451 hasConcept C118021083 @default.
• W2098515451 hasConcept C127413603 @default.
• W2098515451 hasConcept C149091818 @default.
• W2098515451 hasConcept C149635348 @default.
• W2098515451 hasConcept C177264268 @default.
• W2098515451 hasConcept C186846655 @default.
• W2098515451 hasConcept C188817802 @default.
• W2098515451 hasConcept C190560348 @default.
• W2098515451 hasConcept C199360897 @default.
• W2098515451 hasConcept C200601418 @default.
• W2098515451 hasConcept C201995342 @default.
• W2098515451 hasConcept C2777904410 @default.
• W2098515451 hasConcept C2780451532 @default.
• W2098515451 hasConcept C3406870 @default.
• W2098515451 hasConcept C37135326 @default.
• W2098515451 hasConcept C41008148 @default.
• W2098515451 hasConcept C62460635 @default.
• W2098515451 hasConcept C74524168 @default.
• W2098515451 hasConcept C77390884 @default.
• W2098515451 hasConceptScore W2098515451C111498074 @default.
• W2098515451 hasConceptScore W2098515451C115903868 @default.
• W2098515451 hasConceptScore W2098515451C118021083 @default.
• W2098515451 hasConceptScore W2098515451C127413603 @default.
• W2098515451 hasConceptScore W2098515451C149091818 @default.
• W2098515451 hasConceptScore W2098515451C149635348 @default.
• W2098515451 hasConceptScore W2098515451C177264268 @default.
• W2098515451 hasConceptScore W2098515451C186846655 @default.
• W2098515451 hasConceptScore W2098515451C188817802 @default.
• W2098515451 hasConceptScore W2098515451C190560348 @default.
• W2098515451 hasConceptScore W2098515451C199360897 @default.
• W2098515451 hasConceptScore W2098515451C200601418 @default.
• W2098515451 hasConceptScore W2098515451C201995342 @default.
• W2098515451 hasConceptScore W2098515451C2777904410 @default.
• W2098515451 hasConceptScore W2098515451C2780451532 @default.
• W2098515451 hasConceptScore W2098515451C3406870 @default.
• W2098515451 hasConceptScore W2098515451C37135326 @default.
• W2098515451 hasConceptScore W2098515451C41008148 @default.
• W2098515451 hasConceptScore W2098515451C62460635 @default.
• W2098515451 hasConceptScore W2098515451C74524168 @default.
• W2098515451 hasConceptScore W2098515451C77390884 @default.
• W2098515451 hasLocation W20985154511 @default.
• W2098515451 hasOpenAccess W2098515451 @default.
• W2098515451 hasPrimaryLocation W20985154511 @default.
• W2098515451 hasRelatedWork W1565646288 @default.
• W2098515451 hasRelatedWork W2024753805 @default.
• W2098515451 hasRelatedWork W2265949296 @default.
• W2098515451 hasRelatedWork W2302670718 @default.
• W2098515451 hasRelatedWork W2304048052 @default.
• W2098515451 hasRelatedWork W2337674744 @default.
• W2098515451 hasRelatedWork W2402671529 @default.
• W2098515451 hasRelatedWork W2465465307 @default.
• W2098515451 hasRelatedWork W2483901566 @default.
• W2098515451 hasRelatedWork W2511416872 @default.
• W2098515451 hasRelatedWork W2534107961 @default.
• W2098515451 hasRelatedWork W2599880209 @default.
• W2098515451 hasRelatedWork W2618644177 @default.
• W2098515451 hasRelatedWork W2901575532 @default.
• W2098515451 hasRelatedWork W2950360254 @default.
• W2098515451 hasRelatedWork W2967277443 @default.
• W2098515451 hasRelatedWork W2982321650 @default.
• W2098515451 hasRelatedWork W2990117619 @default.
• W2098515451 hasRelatedWork W3048411260 @default.
• W2098515451 hasRelatedWork W95959045 @default.
• W2098515451 isParatext "false" @default.
• W2098515451 isRetracted "false" @default.
• W2098515451 magId "2098515451" @default.
• W2098515451 workType "article" @default.