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- W2098587002 abstract "This paper addresses the research and development results of error coding methods in ATM applications. These results include new code implementation, parallel decoding processing, and novel code combination. Three codecs have been designed, developed, simulated and are preparing for hardware testing in field programmable gate array logics. For the single cell transmission, the cell header and the Information Field (IF) are protected independently. For multiple cell transmission, both the header and the IF are error protected simultaneously. The combined effect is loss cell recovery due to transmission error and/or interference. All three codecs will be implemented in a single VLSI chip of 22000 gates." @default.
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- W2098587002 date "2002-12-24" @default.
- W2098587002 modified "2023-09-25" @default.
- W2098587002 title "Error coding and loss cell recovery in asynchronous transfer mode" @default.
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- W2098587002 doi "https://doi.org/10.1109/mwscas.1996.593124" @default.
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