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• W2099107925 abstract "This paper presents a RTL synthesis flow that considers area minimization in mapping to complex cells from a technology library. A mapping decision is made by examining the complete design, If a complex cell in the middle of a design has many redundancies because of the boundary conditions (inputs or outputs of the complex cell are somwehow related) the Boolean equations for the complex cell are simplified and the cell is implemented from single-output Boolean gates. Otherwise, the complex cell from the library is retained. This approach not only achieves smaller design but also improves the testability of the overall design." @default.
• W2099107925 created "2016-06-24" @default.
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• W2099107925 date "2002-11-22" @default.
• W2099107925 modified "2023-10-14" @default.
• W2099107925 title "Optimal complex operator mapping" @default.
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• W2099107925 doi "https://doi.org/10.1109/asic.1997.617008" @default.
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